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Tamara den Daas-Wijnen, OEM Global Account Manager with Ventec International Group, discussed ultra-low Dk laminates for low-loss designs. She began by commenting that it was common for designers of high frequency PCBs to be concerned primarily with the loss tangent (Df) of a laminate, without considering it in combination with its dielectric constant (Dk), whereas the two properties were inseparable. She emphasised the importance of understanding the “impedance triangle,” a simple graphical representation demonstrating that for a given Dk and Df, the closer the controlled impedance conductor to the reference plane, the narrower it became. The consequence was that thinner layers required finer traces, which could lead to reduced yield in manufacture. Skin effect was also a significant contributor to signal losses and was more pronounced the finer the conductor. Hence it was desirable to keep conductors as wide as possible. She demonstrated that by decreasing the Dk, but maintaining the impedance, the track width could be increased and hence the trace resistance lowered.
Ventec had developed and qualified a cost-effective family of ultra-low Dk materials with enhanced insertion loss performance, based on a reacted polyphenylene oxide/PTFE/hydrocarbon resin chemistry which could be processed on a standard FR-4 line. Current trace widths could be maintained with smaller layer-to-layer separation, therefore Z-axis packaging density could be increased whilst maintaining or increasing trace width and giving the option of more layers for a given PCB thickness.
Stig Källman, global component engineer for PCB with Ericsson, described a PCB material toolbox to support today’s 3G and 4G networks and future high speed needs in 5G, in the most cost-effective and environmental way. He used the analogy of a Big Mac to illustrate the concept: “With the right recipe the taste is the same wherever you go…”
With the objective of standardization, he discussed the material constituents of laminate: glass, glass weave, copper and resin. It was his philosophy to know the impact of the prepreg, the impact of copper and the impact of process tolerances before considering suitable resin systems and selecting material suppliers. The first objective was to be cost-effective, using cost-efficient layer stack-ups and via structures, knowing manufacturing variation to avoid over-design, and achieving high manufacturing panel utilization.
He listed and detailed the recognized PCB technology drivers: smaller, faster, warmer, energy efficiency and environmental acceptability, and discussed the properties and needs of current halogen-free PCB materials covering the spectrum from standard FR-4.1 to microwave. For the future, the actual Df value of a material would be less significant than being able to hold that value steady over a range of temperatures. And dimensional stability would be increasingly important. He commented that the figures quoted on laminate suppliers’ data sheets were becoming more reliable. For the future, standardisation of copper surface roughness was urgently required, with classification in three levels of Ra being suggested. Materials needed to be UL-qualified to higher maximum operating temperatures, and design constraints should be introduced in minimum hole-wall to hole-wall distances to avoid CAF effects.
With regard to 5G, Källman showed videos demonstrating that 5G was becoming a reality, and Ericsson had already established a global 5G access and transport portfolio, with many additional hardware and software products in development.
Erkko Helminen, advanced development senior manager in corporate technology at TTM Technologies, gave a PCB fabricator’s perspective on the effects of 5G as a driver of PCB technology and processes.
The key feature of the next generation cellular network was 5G New Radio (NR), the global standard for a new air interface based on orthogonal frequency-division multiplexing (OFDM), designed to support the wide variation of 5G device-types. 5G NR technology development was already in progress, with emphasis on data rate, bandwidth, latency and energy saving. With frequencies trending from sub-6GHz towards 100GHz, multiple-input multiple-output mobile antenna design and fabrication became a challenge, with etching and registration accuracy being critical and innovative processes such as laser structuring being possible alternatives, and improvements in current millimetre-wave substrates being sought.
PCB processing challenges in networking and computing included imaging accuracy, plating quality, etching accuracy, lamination tolerances in x, y and z axes, drilling tolerances, layer to layer registration, copper surface treatments and thermal management. New cost-effective material solutions and innovations would be required: mid loss, low loss and ultra low loss FR-4 materials, as well as PTFE, LCP and flexible materials with tighter mechanical and electrical tolerances.
In ICT, the key next-generation PCB technology drivers were signal integrity, radio-frequency engineering and component miniaturization, and tighter and tighter tolerances would inevitably be demanded. HDI provided advantages in RF and high-speed PCBs.
Smartphone evolution was characterised by the increasing complexity of the advanced semiconductor package technology, antenna integration and placement, and the expansion of battery capacity. Consequently, the PCB was being forced into smaller spaces, with miniaturisation achieved by a shift from 100 micron subtractive-technology HDI, through 50 micron any-layer, towards 15 micron SLP and mSAT.
Driver assistance and safety systems, and developments towards autonomous vehicles were the main technology drivers in automotive electronics, with emphasis on reliability, miniaturisation and digitalisation. To put a perspective on connectivity requirements, Intel had estimated that an autonomous car would generate about 4000Gb of data every 24 hours.
Helminen suggested that candidates for the next generation of PCB technology solutions would include substrate integrated waveguides, innovative flexible and cable interconnect applications, innovative material solutions and innovative process technologies using automation and robotics, with overall cost savings being a prime objective.
EIPC Vice Chairman Emma Hudson from UL moderated the second technical session, with reliability as the theme.
Jean-Paul Birraux, sales and marketing manager with First EIE in Switzerland, discussed developments in panel and roll-to-roll automatic optical inspection and automatic visual inspection for PCBs and components. He began by reviewing First EIE’s product range, which included photoplotters—for which there was still a strong market, UV direct imaging, automatic optical and visual inspection systems, and inkjet printers. The trend was towards larger-format machines. First EIE’s direct imaging technology was based on single-head DMD principles with a collimated arc lamp UV source, giving full-spectrum 360 to 450 nm output.
A merger in 2015 with the Japanese company Inspec, who had long-term experience in AOI and AVI for packaging and components, established a synergy that enabled the development of a new generation of automatic visual inspection systems for PCB inspection. A unique feature was the capability to create a master reference image from a single sample, and to inspect both sides of a 240 mm x 240 mm circuit in a third of the time taken by a human inspector, capturing defects to the 20 micron level. A current project integrated First EIE’s latest EDI imager and two Inspec AVI systems in-line with developing and etching to enable continuous roll-to-roll processing, with resist inspection after developing and pattern inspection after etching.
Graham Naisbitt, managing director of Gen3 Systems and active member of several IPC, IEC and BSI standards committees, discussed the limitations of traditional ionic contamination testing of PCBs and assemblies, and described a new approach which aimed to use the dissolvable ionic material as a process indicator rather than as a cleanliness measurement that could give misleading results and fail reliable product. A recent paper published by Robert Bosch and Gen3 Systems had demonstrated the validity of the process monitoring approach, which had shown good reproducibility across a number of sites world-wide. Standardisation activities were in progress in IEC and IPC that reflected this change in approach. Naisbitt was heading the team leading the development of IEC 61189-5-504, a test method designed to monitor the soluble ionic residues present upon a test sample that could be a circuit board, an electronic component or an assembly. The conductivity of the solution used to dissolve the ionic residues was measured to evaluate the level of ionic residues, and process control was achieved by reproducing previous set limits of measured ionic material for any given test piece. The test was of short duration, 15 minutes, and run at room temperature.