Test points are typically placed on a PCB for verifying that a circuit card assembly (CCA), within its production cycle, has been built to specification and is operating in an acceptable manner. They are also used in the design phase as aids in system integration, design verification, and debug. In many instances, test points are a critical part of the process for launching, producing, and maintaining a successful product.
Sadly, many times test points are left as an afterthought and squeezed into a design after PCB layout is “complete,” signal integrity analysis is “done,” and all but the final design review remains. Now, let’s see what we can do to effectively place test points in our CCAs.
First and foremost, have a plan. Start with your CCA project schedule (or informally your task list) where PCB test points will have visibility and accountability. Test point milestones/tasks should be assigned to the CCA development portion of the project schedule. The following are high level guidelines to when/where these tasks should be added. Keep in mind that some of the items below may be executed in series and/or parallel. It would be up to you to determine how these would best fit your project development environment.
- Preliminary design: Test point coverage identified for circuit groups/types as full, partial, or none. Circuit groups/types that may experience signal integrity issues due to the addition of test points should be identified. The test point interface(s) (clamshell, flying probe, manual probe) and methodologies (JTAG, ICT, or a combination) should be identified.
- Detailed design: Test points assigned to specific traces/nets within the design. Test point probes and PCB pad size(s) should be identified. Initial signal integrity analysis should be performed to provide guidelines and rules for test point placement during PCB layout. PCB area study and preliminary part placement should include the planned test points. Mechanical, test, and manufacturing test point requirements are translated into rules/constraints in the PCB layout.
- Critical design: Test point placement finalized and agreed upon or at least conceded to with a clear assessment of the risks and responsibilities. Test point locations are communicated to those responsible for test fixture development.
Any further addition to the schedule outside of the development phase should be based on risk mitigation as deemed necessary by a project/program risk assessment or relevant issues/problems as they are identified or encountered during the project execution. Now that there is a plan, how is it executed? That is up to you and your team, however, I do have some advice I would like to share with you.
Identifying which circuits or interfaces that require test points should be done judiciously and with intent. I typically intend test points to be for production or design use. Production use has to do with making sure the CCA has been built and is functioning as specified. Design use is for design verification, integration, and debug. Circuit type strongly affects whether test points are an option. In general, radio frequency (RF), high-speed digital, filter, and control loop feedback circuits are not good choices for addition of test points and should be considered at the discretion of the designer. For instance, placing a test point in the control feedback of a switching power supply can adversely affect power supply stability and should be done at the discretion of the power supply designer. Obtaining test point coverage at the cost of design integrity is usually a poor choice. Careful categorization of test points helps with scoping tasks later in the development process.
The physical test interface to test points on the CCA is usually decided by its perceived cost effectiveness. High-volume production environments will commonly use application-specific clamshell fixtures due to their high-volume parallel test capability. Highly complex but low volume CCAs are usually good candidates for flying probe test systems due to their high configurability at the cost of slower serial test. Manual or clamp probe test fixtures can be a means to repeatable testing at a low upfront cost and can aid in design integration/debug or more complex test fixture development.
Many complex logic or mixed-signal devices (FPGA, CPLD, microprocessors, microcontrollers, and DSPs) have built-in JTAG boundary scan interfaces which allow for highly flexible interface testing/interactions on a CCA such as inter component connectivity tests, memory identification and functional tests, programming non-volatile memory, and even digital IO control or JTAG enabled devices. In-circuit test is usually performed to verify circuit functionality that cannot be measured externally and for high volume production throughput. Thoughtful consideration of test fixturing and test methodology helps with the detailed implementation of test points in the design process.
As I have said before, “A sim in time saves dimes, especially on the assembly line.” The effects of placing a test point on a PCB trace can range from insignificant to disastrous. The capacitance of a test point can easily range from a 0.1 to 1 picofarads (pF) of capacitance based on its geometry. Also, test points are often connected to PCB traces by means of a via (which can itself add up to 1 pF of capacitance. It is common for a capacitor in a power supply feedback control loop or MHz bandpass filter to be in the range of 6.8 pF to 22 pF. An additional parasitic capacitance of 1-2 pF (5% to 30% compared to the intended value) to accommodate a test point may indeed be unbearable, especially since this additional capacitance may add unwanted poles/zeros to the circuit, fundamentally changing its operation.
Test points can also add unwanted delay, reflections, and distortion to digital signals resulting in unwanted clock/data line skew, glitched (non-monotonic) rising/falling edges, and excessive signal over/under shoot. Signal integrity simulations and analysis that include test points can help avoid common test point placement problems.
Mechanical and manufacturing aspects of test point placement are where I usually see compromise or even complete abandonment of requirements. The reasoning is usually along the lines of “electrical and test coverage requirements outweigh those of mechanical, test, and manufacturing.” I equate this to getting a “good” deal on a car that has no brakes. Sure, it can get you there, but at what cost? Test probes typically apply around 3–8 ounces of force on a test point. This does not sound like a lot of force but considering the area of a test point is typically between 0.00126 (40 mils in diameter) and 0.0044 (75 mils in diameter) square inches, the pressure applied at the test point is roughly between 40 and 400 pounds per square inch.
To get a sense of the pressure being applied, take a #2 pencil (0.3 inches in diameter) and push on a scale to produce between 3 and 28 pounds of force. It quickly becomes apparent that the force being applied at the test point is non-trivial and deserves appropriate consideration. Without proper support in place, test probes will bend and flex CCAs, potentially causing solder joint failures or even PCB damage. With that in mind, here is a list of common rules to placing test points on a PCB.
- The area on the PCB that is opposite the test point should remain open to accommodate a support or press plate, so that an equal and opposing force can be applied in the same XY coordinate of the test point.
- Test points should not be placed underneath components on the opposite side of the board.
- Test points should not be placed underneath BGA components or ceramic packages.
- Test points should not be placed over vias.
- Test points should match the size of the center spacing specified by the test probe manufacturer. For example, some standard center spacing values are 25, 39, 50, 75 and 100 mils.
- Test points should be placed at least 1.5 times the diameter of the test pad diameter apart, center to center. Two 40-mil test points should be at least 60 mils apart. A 40-mil and 60-mil test point should be at least 75 mils apart.
- Test points should be placed some what symmetrically around the PCB so that forces are distributed and even across the CCA during engagement and disengagement of test probes.
- Placing test points on a single side of the PCB will lead to a less complex test fixture design.
Modern PCB CAD tools can assign constraints/rules to PCB test points, which encompass the above rules for test point placement. My suggestion is to use the functionality they offer.
And now the hard part. All the stakeholders must either agree or concede to the final test point placement. Any concession should be assigned a risk and a stakeholder responsible for that concession. Once this is completed, finalized test point data is handed over to those who are developing the CCA test fixtures. Finalized test point data should be clear, concise, and unambiguous. Modern PCB CAD tools can export detailed test point reports including, but not limited to, size, XY locations, PCB side, and associated net(s). A mechanical model of the CCA can also be exported in various 3D formats with most modern PCB CAD tools. I hope this helps illustrate that PCB test points can make or break a successful CCA design and should not be overlooked.
Chris Young is owner/lead engineer at Young Engineering Services LLC.