Intel Joins DARPA’s Space-BACN to Accelerate Inter-Satellite Communications

Reading time ( words)

The U.S. Defense Advanced Research Projects Agency (DARPA) has selected Intel for Phase 1 of the Space-Based Adaptive Communications Node (Space-BACN) program, which aims to create a low-cost, reconfigurable optical communications terminal that will translate information between diverse satellite constellations. A Space-BACN satellite terminal will enable communications between satellite constellations, enabling data to be sent anywhere around the planet at the speed of light.

“Intel’s vision is to create world-changing technology that improves the life of every person on the planet. This program helps us to deliver on that vision by enabling global connectivity from space to anywhere across the planet – enabling broadband services and the IoT where not just every person but everything is connected,” says Sergey Shumarayev, Intel senior principal engineer and principal investigator in the Programmable Solutions CTO Group

DARPA is planning for a future where tens of thousands of satellites from multiple private sector organizations deliver broadband services from low earth orbit (LEO). The goal of Space-BACN is to create an “internet” of satellites, enabling seamless communication between military/government and commercial/civil satellite constellations.

The program will facilitate collaboration among partners to ensure that the terminal being designed is reconfigurable to provide interoperability among the participating constellation providers.

There are three technical areas in the program.

DARPA selected Intel for Technical Area 2 (TA2) along with II-VI Aerospace and Defense and Arizona State University to design a reconfigurable optical modem that will support both current and new communication standards and protocols to enable interoperability among satellite constellations.

Technical Area 1 (TA1) focuses on the development of an optical aperture or “head,” which is responsible for pointing acquisition and tracking, as well as the optical transmit and receive functions. DARPA has selected the following organizations for this technical area: CACI Inc., MBRYONICS and Mynaric.

TA1 will interface to TA2 using single-mode optical fiber.

In Technical Area 3 (TA3), DARPA selected constellation providers – Space Exploration Technologies (SpaceX), Telesat, SpaceLink, Viasat and Kuiper Government Solutions (KGS) LLC (an Amazon subsidiary) – to identify critical command and control elements required to support cross-constellation optical intersatellite link communications and develop the schema necessary to interface between Space-BACN and commercial partner constellations.

Intel is developing its optical modem solution by bringing together experts from its field programmable gate array (FPGA) product group, packaging technologists from its Assembly Test Technology Development (ATTD) division and researchers from Intel Labs.

Based on its leading-edge low-power Intel® Agilex™ FPGA, Intel will also design three new chiplets that will be integrated using Intel’s embedded multi-die interconnect bridge (EMIB) and advanced interface bus (AIB) packaging technologies into a single multi-chip package (MCP) that includes:

  • A DSP/FEC chiplet on Intel 3, the most advanced digital node, that enables low-power, high-speed digital signal processing.
  • A data converter/TIA/driver chiplet on Intel 16, which provides the best-in-class FinFET RF signal processing for integration of high-speed data converters, TIAs and drivers.
  • A PIC chiplet based on Tower Semiconductor photonic technologies that offers low-loss waveguides and options, such as V-groove, enabling automated high-volume fiber coupling integration and assembly.

Intel has commenced Phase 1 of the program where it will design each of the above chiplets and work with the other performers to fully define the interfaces between the system components in each of the other technical areas. Phase 1 will last 14 months and conclude with a preliminary design review.

At the completion of Phase 1, selected performers in the first two technical areas will participate in an 18-month Phase 2 to develop engineering design units of the optical terminal components, while performers in the third technical area will continue to evolve the schema to function in more challenging and dynamic scenarios.


Suggested Items

Boeing, Shield AI Set to Collaborate on Artificial Intelligence, Autonomy for Defense Programs

03/13/2023 | Boeing
Boeing and Shield AI have signed a memorandum of understanding to explore strategic collaboration in the areas of autonomous capabilities and artificial intelligence on current and future defense programs. Shield AI created Hivemind, an artificial intelligence pilot that has flown a variety of aircraft. According to Shield AI, the AI pilot can also enable swarms of drones and aircraft to operate autonomously without GPS, communications or a human pilot in the cockpit.

A Conversation With ‘The Space Gal’

02/23/2023 | I-Connect007 Editorial Team
With multiple advanced degrees in aerospace science, Emily Calandrelli could have had her pick of any project in earth and space science. Instead, she has chosen to use her skills in science policy and communication to break down complex science topics, advocate for women in STEM fields, and bolster enthusiasm for the next generation of scientists through her own Netflix show and an active slate of social media accounts. Emily’s platform is huge, but it's one that she wholeheartedly embraces. In this interview with the I-Connect007 Editorial Team, Emily talks about her unconventional entry into science, what’s ahead for space commerce, advice for industry leaders, and what she really thinks about going into space.

A Challenge Facing Aerospace Designers In 2023

01/24/2023 | Lee Ritchey, Speeding Edge
As the aerospace industry has been tasked with fitting increasingly complex electronics in existing airframes the demands on PCB substrates have begun to overtask the existing state of the art in PCB fabrication. Recently, I was called in to troubleshoot some reliability problems with a very dense PCB that had components on both sides and required the use of stacked blind vias and buried vias. The usual name for this kind of design is “build-up fabrication,” requiring many trips through the lamination, drilling, and plating operations at a fabricator.

Copyright © 2023 I-Connect007 | IPC Publishing Group Inc. All rights reserved.